READY FOR CHRONSUITE 3

As a valued INCHRON customer, you will be acutely aware of the growing complexity of automotive software. Experts believe that, in the near future, 90% of innovation in cars will result from software, and this aligns with our experience too. With automotive architectures moving to high-performance computing (HPC), cross-domain computers, zone ECUs, and other approaches, we’ve been assessing how we can continue to best support you.

 Therefore it gives us great pleasure to announce the launch of chronSUITE 3, our next-generation timing optimization toolkit. chronSUITE 3 builds upon our current toolkits’ established timing analysis capabilities while adding the support needed for platforms based upon SoCs with heterogeneous hardware featuring multiple cores and hardware accelerators. Reflecting the significance of the improvements made, we have also changed the name from Tool-Suite to chronSUITE.

chronSUITE retains its three core tools, chronSIM, chronVIEW, and chronVAL. The first two tools have received a significant makeover, with an updated user interface and enhanced viewing capabilities for trace view diagrams. As heterogeneous SoCs take center stage in automotive platforms, chronSUITE provides improved support for analyzing multi-threaded applications. The modeling options for specifying execution behavior of processes and functions have been expanded, as have the models for queued communication and signal routing of event chains. Memory bus congestion is a common challenge and, here too, new capabilities have been implemented.

System models have proven themselves, time and again, to be essential in keeping on top of timing issues. To simplify the work of system and software architects, it is now possible to directly import APP4MC AMALTHEA models.

With chronSUITE 3, the team’s focus has been on simplifying the increasing complexity of automotive platforms resulting from dynamic software architectures. As a result, it enables development teams to determine an optimized mapping of software components to cores and hardware accelerators. Architects can experiment with various task and ISR scheduling schemes to meet mixed safety-critical application requirements during the design phase. For software integrators, the impact of changes in both core and bus utilization can be quickly assessed. And test teams can show that timing requirements are fulfilled using efficient, automated CI/CD pipelines.

If you’d like to inform yourself further on what chronSUITE 3 has to offer, please take a look at our updated product page:

To quickly assess the additional capabilities of chronSUITE 3, we have also prepared a feature overview:

As always, the INCHRON team is always available to address your questions personally. Simply reach out to your local contact or request a meeting via our contact form:

Yours,

INCHRON team

Dr. Ralf Münzenberger, Dr. Ingmar Roggatz, Olaf Schmidt

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